I am new to the GPS and this community. I want to implement a GPS-SDR and do the acquisition phase in FPGA. According to the my first glance I found out SoftGNSS by Mr. Akos, MATLAB code.
In his implementation, he had 3-bit digital data fed through the processor but not I-Q demodulated in the implementation of parallel code phase acquisition algorithm. In his implementation, the input data is multiplied by sinus signal to achieve I, cosine signal to achieve Q and then they forwarded to the FFT block. However, there are a lot of COTS GPS front-end ICs and they have 1/2 bit I and Q signals.
But for a GPS front-end I already have I and Q signals. So, what should I do with those I and Q data? Should I multiply both of them with sine and then feed through the FFT block? Does it make sense?